PDF) Delay-Insensitive Cell Matrix.
PDF) Pseudorandom, Weighted Random and Pseudoexhaustive Test Patterns Generated in Universal Cellular Automata
PDF) A Low-Cost BIST Scheme for Test Vector Embedding in Accumulator-Generated Sequences
PDF) Moduli Set Selection and Cost Estimation for RNS-Based FIR Filter and Filter Bank Design
PDF) Survival analysis for modeling critical events that communities may undergo in dynamic social networks
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PDF) A Low-Cost BIST Scheme for Test Vector Embedding in Accumulator-Generated Sequences
PDF) A Low-Cost BIST Scheme for Test Vector Embedding in Accumulator-Generated Sequences
PDF) A Low-Cost BIST Scheme for Test Vector Embedding in Accumulator-Generated Sequences
PDF) Symmetry Measure for Memory Test and Its Application in BIST Optimization
PDF) Memory testing with a RISC microcontroller
IVML > People > Phivos Mylonas
PDF) High-Level Test Synthesis for Delay Fault Testability
PDF) Extending Internet into Space – ESA DTN Testbed Implementation and Evaluation
PDF) UHF Receiver Front-End: Implementation and Analog Baseband Design Considerations
PDF) A Context-Aware Meeting Room: Mobile Interaction and Collaboration Using Android, Java ME and Windows Mobile
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PDF) New Algorithms for Address Decoder Delay Faults and Bit Line Imbalance Faults
PDF) On the Generation of Functional Test Programs for the Cache Replacement Logic
Steffen Tarnick's research works | Universität Potsdam, Potsdam and other places
PDF) A Closed-Loop Approach for Improving the Wellness of Low-Income Elders at Home Using Game Consoles
Dimitris Magos's research works | University of West Attica, Athens (TEIATH) and other places
Education and Information Technologies | Home
PDF) Efficient Test Compaction for Pseudo-Random Testing
PDF) Detection of Delay Faults in Memory Address Decoders
